1. Field of the Invention
The present invention generally relates to the formation of capacitors in dynamic random access memory (DRAM) arrays and more specifically to the utilization of unused "Dummy" border areas of the DRAM arrays as capacitors and other useful structures.
2. Description of the Related Art
Large capacitors are often needed in very large scale integration (VLSI) circuits. However, such capacitors require a large amount of chip area. As the density of circuits increase, it becomes more difficult to allocate sufficient area for such capacitors.
VLSI circuits, such as dynamic random access memory (DRAM) arrays have uniform repeatable shape patterns which are formed by lithographic techniques. However, due to different pattern densities, the patterns along the edges of the array are slightly different than the patterns not located along the edge (e.g., the "edge" effect). For example, elements such as via contacts that are located near the edge of the array often have patterns after exposure which are smaller than those located in the middle of the array due to uneven pattern density.
To overcome this problem a few columns of "dummy" patterns are formed at the edge of the array. Therefore, there are no active devices located at the edge of the array and all active devices will have uniformly-patterned shapes. The dummy patterns formed along the edge of the array are normally tied to a certain voltage level (e.g., GND/Vdd) and are not used. For large arrays the area wasted by a the dummy patterns can be significant.
The invention utilizes the otherwise wasted areas to formed useful elements such as capacitors. Therefore the invention increases the effective utilization of the chip.